🔮E12: Nanomechanical Computing- Gears of Space War? Old Ideas at New Scales
Novel combination of low power consumption and radiation hardness; low TRL and challenging manufacturing mean 2030+ timeline
👋 Thanks for coming out tonight. You could have been anywhere in the world, but you’re here with me. I appreciate that. I’m Lawrence Lundy-Bryan; I curate State of the Future, the Deep Tech Almanac powered by Lunar Ventures. We invest in pre-seed and seed deep tech.
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Let’s get into it, shall we? Power consumption is a critical challenge across computing for reducing energy costs and environmental impact. The data center uses 1-1.3% of global final electricity demand. And processors account for 30% of data center electricity use, projected to reach 143 billion kWh by 2023. Algorithms and deep learning scheduling can help; you might remember the DeepMind wind farm project that reduced energy use by 20%. Lovely. With hardware, depending on the specificity of the task, you can use ASIC accelerators to get anything up to 100x improvements over GPUs/CPUs. However, this gains are limited to very specific tasks. 100x is hardly incremental, but new chip paradigms are needed for more general-purpose breakthrough 1000x gains.
Over the next decade, we should expect huge growth in non-conventional computing. I’ve already covered optical, analog, and neuromorphic. I’ll publish more on Quantum soon. But what if I told you, Babbage had it right all along? What if society took a wrong turn with electronic computers? What if it should have been gears and levers all along?
In 2023, we are revisiting some old ideas at new scales. Nanomechanical architectures achieve efficiencies far beyond conventional digital von Neumann designs. I’m talking 1000x lower power consumption. And for good measure, they are radiation-proof.
Are you thinking what I’m thinking? Space wars. The answer is space wars.
⚙️Nanomechanical Computing TLDR
Summary: Using nanoscale mechanical components like cantilevers, gears, and switches to perform logic operations and data storage at higher densities and efficiencies than conventional transistors.
Viability (2) - Early research stage with demonstrations of individual components but significant challenges to realize fully integrated systems.
Novelty (4) - Radiation hardness (rad-hard) and extreme low-power (1000x) (although quantum is superior) are well suited to space, defence and nuclear.
Drivers (3) - Demand for rad-hard ASICs is increasing as the space economy grows, as existing chips are heavy, expensive, and inconsistent.
Diffusion (1) - Slow adoption because of the niche rad-hard market and the need to develop an entirely new hardware/software supply chain.
Impact (2) - Breakthroughs in quantum minimise energy-efficiency advantages, and radiation hardness advantages persist for space/defence.
Timing (2030+) - Given current research limitation, 10+ years to commercial viability.
Under/Overrated: Correctly Rated. A novel combination of low power consumption and radiation hardness, but low TRL makes it worth watching.
Prediction: By 2030, a nanomechanical device will be used in 10+ satellites, but general computing chips remain over a decade away.
Summary
Mechanical computing dates back to the 1800s, with machines like Charles Babbage's Analytical Engine using gears and levers to perform automated calculations. While electronic computing came to dominate the 20th century, interest persisted in alternative computing paradigms utilizing mechanical motion and physical interactions. With the emergence of microelectromechanical systems (MEMS) technology in the 1970s-1980s, researchers began exploring miniaturized resonators, switches, and cantilevers for logic operations and memory.
By the 1990s-2000s, advances in nanofabrication enabled the first demonstrations of nanoelectromechanical (NEMS) devices just nanometers in size. This allowed mechanical computing and sensing concepts to be realized at unprecedented densities. Nanomechanical computing aims to use these nanoscale mechanical components like cantilevers (a rigid structural element that extends horizontally and is supported at only one end), gears and switches to perform logic and memory at higher densities and efficiencies compared to conventional CMOS transistors. It remains an early-stage technology still confined to research labs, with challenges around manufacturability, reliability, and integration before commercial viability. However, the huge potential for mechanical computing motivates research interest.
Note: I’m only covering nanomechanical transistors; nanomechanical sensors and memory will be covered separately.
Viability (2)
Nanomechanical computing remains at a proof-of-concept stage, estimated at technology readiness level 3. Individual nanomechanical logic gates (NAND, NOR gates) under 20nm and memory cells leveraging properties like stiction and magnetomotive forces have been demonstrated, but not fully integrated systems. Recent advances include mechanical logic gates under 7nm using piezoelectric materials, cantilever arrays with densities over 1Tb/in2 for non-volatile memory, and lithography techniques able to produce billions of nanodevices in parallel.
However, the manufacturability of complex nanomechanical systems with billions of devices, controlling device variability across dies, and integration with <10nm node CMOS circuits remain major hurdles. More work is needed to improve fabrication throughput, yield over 90%, and precision below 5nm at the nanoscale before viability for commercial systems.
Novelty (4)
Nanomechanical computing excels in terms of radiation hardness and energy efficiency. The approach has demonstrated the potential for switching energies approximately 1000 times lower than cutting-edge 5nm CMOS transistors in lab tests. Right, stick with me here. I’m no expert; I’m talking femtojoules to get a sense of the orders of magnitude we’re talking about.
By leveraging nanoscale mechanical phenomena like vibration, stiction, and stress, nanomechanical devices like cantilever switches and gears can theoretically operate at 0.001-0.01 femtojoules per switch event. This is around 2-3 orders of magnitude lower than analog electronic or photonic switches, measured in the 0.1-1 femtojoule range for minimum energy operation. Among post-CMOS computing approaches, only quantum has lower theoretical limits. Superconducting quantum bits operate at 10^-8 femtojoules, while spin and photon qubits demonstrate switching energies as low as 10^-9 to 10^-10 femtojoules. This makes quantum computing the most energy-efficient known computing paradigm.
Regarding radiation hardness, nanomechanical computing is uniquely suited for high-radiation environments. Now, I couldn’t find good comparisons of the varying degrees of radiation hardness. However, it is generally true that the mechanical state provides inherent radiation resilience. Nanomechanical devices like cantilevers can tolerate very high radiation doses without disruption. Analog ICs are terrible, they have inherent noise tolerance advantages and graceful failure modes when subjected to radiation. Digital CMOS electronics, however, are susceptible to radiation-induced bit flips and permanently damaged transistors over time. However, redundancy techniques like error-correcting codes can improve tolerance. Quantum computers are particularly susceptible to radiation. But we have to make a quantum computer work first before we try and send one to space.
Tldr, the low power consumption and high radiation hardness make nanomechanical computing well-suited for space, defence, and nuclear applications.
Drivers (3)
Demand: The market for radiation-hardened (rad-hard) application-specific integrated circuits (ASICs) for use in spacecraft, satellites, and space systems was worth $300 million in 2021, growing at roughly 9% annually, driven by new satellite constellation projects like SpaceX's Starlink. Leading manufacturers providing rad-hard ASICs include STMicroelectronics, Infineon, BAE Systems, Honeywell, Microchip, and Texas Instruments. Their chips are fabricated using specialized hardened CMOS processes and feature redundancy and error correction to meet strict reliability requirements. Radiation hardening techniques add substantial cost, with space-grade ASICs ranging from $50k to $500k per part, depending on complexity, versus just $10-$100 for commercial ICs. Beyond cost, rad-hard ASICs are not always effective. As noted, Ionizing particles in space environments can flip bits or permanently damage sensitive CMOS devices over time. Electromagnetic pulse (EMP) attacks on satellites can instantly overload electronics (This article is amazing: A Planetary Rotational Nuclear-Emp Campaign to Destroy The Earth’s Satellite Layer). NASA estimates cosmic radiation may cause a single-event monthly upset, disrupting a satellite computer. The US Air Force reported over 50 cybersecurity breaches from 2010-2019 that could be attributed to space radiation.
So, there is a demand for computing paradigms with innate radiation resilience for space, aviation, and defence applications to improve reliability. At the same time, the rise of miniaturized edge sensors and electronics for the space industry is also driving demand for low-power computing under 1W.
Supply: On the supply side, emerging capabilities in nanofabrication, 3D printing, and materials science allow the construction of nanomechanical structures and devices with features below 10nm. This enables engineering complex nanomechanical logic and memory architectures to replace electronics in radiation-intensive environments. The supply of more robust components is driven by aerospace industry needs. DARPA initiated a Towards Atomic-Level Understanding program in 2021 focused on modelling and designing radiation-hardened nanoelectronic devices and systems, indicating growing R&D initiatives. Overall the extreme reliability and efficiency requirements of space, defense, aviation, and nuclear industries are spurring interest in nanomechanical computing solutions.
Diffusion (1)
Demand: While radiation hardness and low power operation are major needs in space and defence, adopting nanomechanical computing requires overcoming inertia given the existing electronics infrastructure. Significant upfront investment would be needed to migrate mission-critical systems to new architectures. Current components supply chains are optimized for analog and digital ASICs. A complete lifecycle reliability analysis for nanomechanical devices is lacking - uncertainty remains around failure rates over decades of use. This poses an adoption risk for industries where continuity and risk management are paramount. Hybrid systems may enable a gradual transition path forward.
Supply: Design expertise in nanomechanical computing is rare - few engineers are trained in this paradigm beyond physics research labs. Electronic design automation (EDA) tools would need extensive retrofitting to model and program mechanical devices and hybrid systems. The supply chain and manufacturing processes for nanomechanical logic and memory have not been established, with production limited to university fabs. Ramping to the commercial scale from prototype levels poses significant challenges for nanofabrication. Standards for everything from mechanical logic gates to interconnects and testing procedures will need development to enable ecosystem support. While promising, transforming nanomechanical research into mission-critical space and defence infrastructure remains a distant prospect.
Impact (2)
In a high-impact scenario, breakthroughs in manufacturability and integration enable 10-100X energy efficiency improvement in electronics. These breakthroughs happen in the next 5-10 years before quantum computing. Either fault-tolerant quantum computers arrive 5-10 years after nanomechanical computers or never. Nanomechanical computing wins the market for extremely low-power, low-performance edge applications. Additionally, as space becomes an increasingly important battleground for control, radiation resistance becomes one of space's most important computer features. In this context, analog and digital ASICs improve, but the cost of nanomechanical chips is worth it for the additional security and durability.
A moderate impact scenario would involve applications in niche electronics such as space, nuclear and defence, as noted, but where digital and analog ASICs become materially better, maybe in terms of error correction and noise tolerance. The radiation hardness advantage is eroded, and the higher costs are not worth it for most commercial providers, but for national security, it is vital. The low-impact scenario of limited adoption is also plausible if fabrication, yield, and reliability barriers remain. Nanomechanical devices are never technically or economically viable for the semiconductor industry.
On balance, quantum computing likely yields devices with high performance and low energy. Nanomechanical devices play a moderate role in computing, primarily for defence in space. Security becomes more important as the space economy grows and more critical infrastructure is placed in space.
Timing (2030+)
Given the current state of nanomechanical computing research, widespread commercial adoption is unlikely before 2030. Breakthroughs in manufacturability, integration, and design tools are needed first. Industry investment and coordination remain limited. A 20+ year timeline from invention to maturity is typical for a new computing paradigm. If progress accelerates, niche applications could emerge by 2030, but more impactful systems are a longer-term prospect.
Under/Overrated: Correctly Rated
A novel combination of low power consumption and radiation hardness, but ultimately the low-performance capabilities make it worse than quantum in the long term, and digital and analog ASICs for the radiation-hardened market are good enough for the foreseeable future.
Open Questions
Can fabrication methods consistently produce dense nanomechanical systems with adequate yield/reliability?
How vital will radiation hardness be for the space economy? Will analog or digital rad-hard ASICs be good enough for commercial applications? Will analog or digital rad-hard ASICs be good enough for defence purposes?
How will variability be monitored and controlled across billions of nanomechanical devices?
What standards and tools are needed to design and program hybrid nanomechanical-CMOS systems?
Prediction
By 2030, a nanomechanical device will be used in 10+ satellites, but general computing chips remain over a decade away.
Researchers, Startups, and Investors to Watch
Researchers
Raj Mohanty, Mohanty Group, Dept of Physics, Boston University.
Micromechanical Resonator Driven by Radiation Pressure Force.
Scientific Reports 7, 16056 (2017) https://www.nature.com/articles/s41598-017-16063-4.epdf
Robert Blick is a professor of physics and nanoscience at the Center for Hybrid Nanostructures. The focus of his work is on the physics of nanostructures and their applications in the fields of nanomechanics and nano-bioelectronics. He is the director of the Institute of Nanostructure and Solid-State Physics of the University of Hamburg, Germany. The institute is located on the campus of DESY, the world-renowned German Synchrotron source.
More? Help, please.
Startups
Zyvex Labs: Design, construct and commercialize precisely manufactured products. Raised $28 million from DARPA, the Army Research Office, and the Department of Energy.
Read: https://dallasinnovates.com/zyvex-labs-unveils-worlds-highest-resolution-lithography-system-to-aid-in-quantum-computing-research/
More? Help, please.
Thanks for reading. Do share before you go.
Sources
Babbage nanomachine promises low-energy computing, https://www.newscientist.com/article/mg20527536-600-babbage-nanomachine-promises-low-energy-computing/
Computer component could use as little energy as physically possible, https://www.newscientist.com/article/2327678-computer-component-could-use-as-little-energy-as-physically-possible/
Logically reversible and irreversible computation, https://www.rajmohanty.org/nanomechanical-computing
Scalable nanomechanical logic gate, https://arxiv.org/pdf/2206.11661.pdf
Nanomechanical computers - an answer to today's power-hogging silicon chips https://www.nanowerk.com/spotlight/spotid=2272.php